1. Field of the Invention
This invention relates to a column electrode driving circuit for a display apparatus, and more particularly to a column electrode driving circuit for a matrix type display apparatus.
2. Description of the Prior Art
As a typical example of a matrix type display device, a matrix type liquid crystal display (LCD) apparatus is shown in FIG. 6. The LCD apparatus of FIG. 6 comprises an LCD panel 61 having: a plurality of row electrodes 61a which are disposed on a substrate parallel to one another; and a plurality of column electrodes 61b which intersect the row electrodes 61a. A picture element (pixel) electrode 61c and a thin film transistor. (TFT) 61d which functions as a switching element, pair is disposed at each crossing of the row electrodes 61a and the column electrodes 61b. The LCD panel 61 is driven by a row electrode driving circuit 62 and column electrode driving circuit 63. The row electrode driving circuit 62 produces scanning pulses which are in turn supplied to the row electrodes 61a to sequentially turn on each row of the switching transistors 61d. The column electrode driving circuit 63 produces voltage signals which are applied to the pixel electrodes 61c through the column electrodes 61b. A control circuit 64 controls the operations of the row electrode driving circuit 62 and the column electrode driving circuit 63.
As shown in FIG. 7, the column electrode driving circuit 63 comprises a shift register circuit 71, a sample and hold circuit 72, and a buffer circuit 73. The shift register circuit 71 shifts a sample signal D in accordance with clock pulses .phi. and sequentially outputs the sample signal to lines q.sub.1, q.sub.2, . . . , q.sub.n. The sample and hold circuit 72 samples and holds a video signal V in accordance with sample signals output to the lines q.sub.1, q.sub.2, . . . , q.sub.n. The buffer circuit 73 simulataneously outputs the voltage signals held in the sample and hold circuit 72 to the column electrodes 61b, as voltage signals Q.sub.1, Q.sub.2, . . . , Q.sub.n, at the time when an output timing signal T is input.
The operation of the column electrode driving circuit 63 will be described with reference to FIG. 8. After the input of the sample signal D, sample signals are sequentially output to the lines q.sub.1, q.sub.2, . . . , q.sub.j, . . . from the shift register circuit 71. The sample and hold circuit 72 samples instantaneous voltages V.sub.i1, . . . , V.sub.ij, . . . of the video signal V in accordance with these sample signals. At the time when the sampling of one row has been completed, the output timing signal T is input, and the buffer circuit 73 operates.
If the number of the column electrodes 61b to be driven is large, the column electrode driving circuit 63 is usually comprised of a plurality of partial column electrode driving circuits 90, each corresponding to a portion of the column electrodes 61b, as shown in FIG. 9. Each of the partial column electrode driving circuits 90 is integrated in one LSI chip, and is provided with a shift register circuit 91, a sample and hold circuit 92, and a buffer circuit 93. The shift register circuit 91, sample and hold circuit 92 and buffer circuit 93 may have the same structure as the shift register circuit 71, sample and hold circuit 72 and buffer circuit 73, respectively, except that the number of column electrodes to drive is different. It is necessary for the shift register circuits 91 in all of the partial column electrode driving circuits 90, as a whole, to continuously perform sampling and holding operations as a single shift register circuit. Therefore the output of the final step of the shift register circuit 91 in each partial column electrode driving circuit 90 is supplied to the shift register circuit 91 in the next partial column electrode driving circuit 90.
In the above mentioned column electrode driving circuit 63, digital signals and analog signals both exist. Therefore, noises from the digital signals which are mixed with the analog signal become a problem. When such a driving circuit is applied to a display apparatus in a small sized television display device, in addition to a direct effect via power lines and signal lines etc., high frequency noises radiated into the air are picked up by an antenna of the device, causing disturbance in the displayed image. Furthermore, at the instant when the level of the digital signals changes, currents of a comparatively large amount flow. As a result, a linear disturbance synchronized with the change in the digital signal level is generated on the display of the display apparatus.
With respect to disturbance in the image caused by a digital signal, counter measures can be considered such as digital signals, which undergo changes in level, being used as little as possible within the column electrode drive circuit during the period when sampling is performed. Alternatively, a circuit for eliminating the high frequency components of the signal can be provided in a location as close as possible to the supply terminal of the digital signal for the column electrode driving circuit.
However, in such a column electrode driving circuit wherein a plurality of LSIs are connected in a cascade, the level of digital signals transmitted between the LSIs changes during the sampling operation, thereby causing the image disturbance. Furthermore, since LSIs are usually mounted in a high density, there are many cases where it is impossible to carry out effective noise countermeasures in the vicinity of the LSIs.